Chinese or Indian passive components are equally good. They just don't have enough market reach and are undocumented but they are highly economical. They tend to lack popularity.
Because they are economical, they provide more options (even for small quantity) and most important their quality of work is much better than Indian counterparts.
Modi is trying to get fabs established in India. We already have design houses that provide IPs what we lack is fabs and dedicated semiconductor manufacturers. Our research institute do have semiconductor know-how yet we are not able to establish our-self in semiconductor domain.
Their is a big difference in having know-how and able to commercially establish our-self.
Don't get blind-sided by patriotism. The only reason American companies have so-called R&D center in India because it is economical and not because they are mission critical for their success.
All labor intensive jobs are transferred to India like validation (design/layout), software and driver development, etc. Very minor adjustment are done in India to an established deign. You many have contacts in that industry but I work in same industry.
From the above statement I can assume you are not from semiconductor or electronics domain.
Most generally micro-controllers and ASIC (not refereed as specialized chips) use 40 nm to 65 nm process as this process is are matured enough to ensure reliability, is economical (commercial viable) and stable.
Nowadays ASICs are moving towards 32 nm for general availability but this will also take time.
Devices tend to use 2 or more process technologies in same die depending on what is to be built. Memories tend to have smaller process node as they tend to dense (more transistors). For Analog or RF domain tend to different process technology.
14 nm process will be waste of money. Even if someone sells us this technology what will be do with it. What will you make with it.
You just don't move to a smaller process node just because it sounds fancy. You move to a smaller node because your semiconductor device needs it. We are currently not making any device where the MOS transistor layout is dense enough to warrant such smaller bleeding edge process node, which will bring problems of its own.
The reason modern CPUs use small process node because they are extremely dense (Ryzen has up-to 32 MB of cache which requires a lot of registers and decapitate a lot of heat), their instruction set is complex and provide a lot of interfaces.. Same goes for FPGA. Unless you have extremely dense their is no need for such bleed edge process nodes. 40 nm process node is also good enough to begin with.
