TSMC's 300mm Chinese Wafer Fab Wins Approval | EE Times

Discussion in 'China' started by Martian, Feb 4, 2016.

  1. Martian

    Martian Respected Member Senior Member

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    The Taiwanese government has given its approval for TSMC to build a 16nm FinFET 300mm semiconductor fabrication plant in mainland China. The $3 billion wafer fab will start operation in the second half of 2018.

    Currently, the most advanced semiconductor fabrication on mainland China is conducted by SMIC at 28nm.

    TSMC's 16nm FinFET will move China forward by two generations of semiconductor fabrication technology.

    28nm ---> 20nm ---> 16nm FinFET

    Also, the 16nm FinFET plant can be later upgraded to 10nm.

    In conclusion, TSMC's $3 billion investment in mainland China is a boost to the Chinese semiconductor industry.
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    TSMC's 300mm Chinese Wafer Fab Wins Approval | EE Times

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  3. Martian

    Martian Respected Member Senior Member

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    SemiWiki reports that TSMC just held its annual Technology Symposium in San Jose. A few more interesting details of the approved TSMC 16nm fabrication plant in Nanjing, China were provided.

    TSMC's ground-breaking for the 16nm China fab will begin in July 2016 (which is only four months away). It will start mass production of 16nm chips in the second half of 2018. This will place tremendous pressure on China's SMIC, which is mainland China's largest foundry. As far as I know, SMIC is not building a 20nm or 16nm semi fab anytime soon.

    TSMC will have a two-generation process lead on SMIC in two years in terms of indigenous production on mainland China. TSMC will most likely displace SMIC as the largest mainland Chinese semiconductor fabrication company in the near future.
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    SemiWiki.com - Key Takeaways from the TSMC Technology Symposium Part 1

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  4. Martian

    Martian Respected Member Senior Member

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    TSMC starts construction of 16nm semiconductor fabrication plant in Nanjing, China.

    The construction of TSMC's 16nm fabrication plant in Nanjing, China is important, because it brings Chinese semiconductor technology closer to the physics limit. Most scientists believe 3nm is the smallest line width for a semiconductor chip due to the limitations of production (e.g. etching and deposition) technology. 3nm is about six atoms wide. 1nm (or two atoms) is probably not viable, because of quantum tunneling.

    Currently, China's SMIC mass produces 28nm semiconductor chips. TSMC's new 16nm plant will bring China a full node closer to the practical physics limit of 3nm.

    28nm (China's current SMIC technology) --> 20nm half-node --> 16/14nm (TSMC's new Nanjing China plant) --> 10nm --> 7nm --> 5nm --> 3nm (probable limit of planar semiconductor technology)

    Once TSMC's 16nm Nanjing China plant becomes operational in 2018, China will only be two full nodes away from the probable physics limit of 3nm planar semiconductor technology. After planar technology cannot be shrunk any further, the focus will shift to stacking more planar chips into 3D FinFET layers. This will allow further computing performance improvements until 3D FinFET technology is exhausted in the future due to the limitation of heat dissipation.

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    TSMC breaks ground for new manufacturing site in Nanjing, says report | DigiTimes

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